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| as3400 as3410 AS3430 low power ambient noise-ca ncelling speaker driver www.austriamicrosystems.com revision 1.02 1 - 51 1 general description the as3400/10/30 are speaker driver with ambient noise cancelling function for handsets, headphones or ear pieces. it is intended to improve quality of e.g. music listening, a phone conversation etc. by reducing background ambient noise. the fully analog implementation allows the lowest power consumption, lowest system bom cost and most natural received voice enhancement otherwise difficult to achieve with dsp implementations. the device is designed to be easily applied to existing architectures. an internal otp-rom can be optionally used to store the microphones gain calibration settings. the as3400/10/30 can be used in different configurations for best trade-off of noise cancellation, required filtering functions and mechanical designs. the simpler feed-forward topology is used to effectively reduce low frequency background noise. the feed-back topology with either 1 or 2 filtering stages can be used to reduce noise for a larger frequency range, and to even implement transfer functions like speaker equalization, baxandall equalization, high/low shelving filter and to set a predefined loop bandwidth. the filter loop is optimized by the user for specific handset electrical and mechanical designs by dimensioning simple r, c components. most handset implementations will make use of a single noise detecting microphone. two microphones could be used to allow for increased flexibility of their location in the handset mechanical design. using the bridged mode allows to even drive high impedance headsets. 2 key features microphone input 128 gain steps @ 0.375db and mute with agc differential, low noise microphone amplifier single ended or differential mode improved supply for electret microphone mic gain otp programmable high efficiency headphone amplifier 2x34mw, 0.1% thd @ 16 , 1.5v supply, 100db snr bridged mode for e.g. 300 loads click and pop less start-up and mode switching line input volume control via serial interface or volume pin 64 steps @ 0.75db and mute, pop-free gain setting single ended stereo or mono differential mode anc processing feed-forward cancellation feed-back cancellation with filter loop transfer function definable via simple rc components simple in production sw calibration 12-30db noise reduction (headset dependent) 10-2000hz wide frequency active noise attenuation (headset dependent) monitor function for assisted hearing, i.e. to monitor announcements fixed (otp prog.) ambient sound amplification to compensate headphone passive attenuation volume controlled ambient sound amplification mixed with fixed (otp prog.) attenuation of linein incremental functions anc with or without music on the receiving path improved dynamic range playback otp rom for automatic trimming during production (4 times programbable) performance parameter 5/3.8ma @ 1.5v stereo/mono anc; <1a quiescent extended psrr for 217hz interfaces 2-wire serial control mode & volume inputs calibration via line-in or 2-wire serial interface (patent pending) single cell or fixed 1.0-1.8v supply with internal cp package as3400, as3410 qfn24 [4x4mm] 0.5mm pitch AS3430 qfn32 [5.x5mm] 0.5mm pitch 3 applications the devices are ideal for ear pieces, headsets, hands-free kits, mobile phones, and voice communicating devices.
www.austriamicrosystems.com revision 1.02 2 - 51 as3400 as3410 AS3430 1v0 data sheet - applications figure 1. as3410 feed forward anc block diagram figure 2. AS3430 feed-back block diagram www.austriamicrosystems.com revision 1.02 3 - 51 as3400 as3410 AS3430 1v0 data sheet - applications figure 3. as3400 feed-back block diagram figure 4. as3400 feed forward block diagram www.austriamicrosystems.com revision 1.02 4 - 51 as3400 as3410 AS3430 1v0 data sheet - contents contents 1 general description ......................................................................................................... ......................................................... 1 2 key features................................................................................................................ ............................................................. 1 3 applications................................................................................................................ ............................................................... 1 4 pin assignments ............................................................................................................. .......................................................... 4 4.1 pin descriptions.......................................................................................................... .......................................................................... 5 5 absolute maximum ratings .................................................................................................... .................................................. 7 6 electrical characteristics.................................................................................................. ......................................................... 8 7 typical operating characteristics ........................................................................................... .................................................. 9 8 detailed description........................................................................................................ ........................................................ 12 8.1 audio line input.......................................................................................................... ........................................................................ 12 8.1.1 gain stage.............................................................................................................. ................................................................... 12 8.1.2 parameter ............................................................................................................... ................................................................... 12 8.2 microphone input.......................................................................................................... ...................................................................... 13 8.2.1 gain stage & limiter.................................................................................................... .............................................................. 13 8.2.2 supply.................................................................................................................. ...................................................................... 13 8.2.3 parameter ............................................................................................................... ................................................................... 14 8.3 headphone output .......................................................................................................... ................................................................... 15 8.3.1 input multiplexer ....................................................................................................... ................................................................. 15 8.3.2 no-pop function......................................................................................................... ............................................................... 15 8.3.3 no-clip function ........................................................................................................ ................................................................ 15 8.3.4 over-current protection................................................................................................. ............................................................ 15 8.3.5 parameter ............................................................................................................... ................................................................... 16 8.4 operational amplifier ..................................................................................................... ..................................................................... 16 8.4.1 parameter ............................................................................................................... ................................................................... 16 8.5 system.................................................................................................................... ......................................................................... 17 8.5.1 power up/down conditions................................................................................................ ....................................................... 17 8.5.2 start-up sequence....................................................................................................... .............................................................. 17 8.5.3 mode switching .......................................................................................................... ............................................................... 18 8.5.4 status indication ....................................................................................................... ................................................................. 19 8.6 vneg charge pump .......................................................................................................... ................................................................ 19 8.6.1 parameter ............................................................................................................... ................................................................... 19 8.7 otp memory & internal registers........................................................................................... ........................................................... 19 8.7.1 register & otp memory configuration ..................................................................................... ................................................ 19 8.7.2 otp fuse burning ........................................................................................................ ............................................................. 20 8.8 2-wire-serial control interface ........................................................................................... ................................................................ 21 8.8.1 protocol................................................................................................................ ...................................................................... 21 8.8.2 parameter ............................................................................................................... ................................................................... 24 9 register de scription........................................................................................................ ........................................................ 25 10 application information .................................................................................................... ..................................................... 38 11 package drawings and markings.............................................................................................. ............................................ 43 12 ordering information....................................................................................................... ...................................................... 47 www.austriamicrosystems.com revision 1.02 5 - 51 as3400 as3410 AS3430 1v0 data sheet - pin assignments 4 pin assignments note: pin assignment may change in preliminary data sheets. figure 5. pin assignments (top view) as3400 qfn 24pin agnd 1 linl 2 linr 3 vol_csda 4 mode_cscl 5 micl 6 hpvdd 18 hpr 17 hpl 16 vss 15 qop2r 14 iop2r 13 mics 7 micr 8 qmicr 9 qlinr 10 iop1r 11 qop1r 12 24 qmicl 23 vneg 22 cpn 21 gnd 20 cpp 19 vbat vneg or open 25 as3410 qfn 24pin agnd 1 linl 2 linr 3 vol_csda 4 mode_cscl 5 6 hpvdd 18 hpr 17 hpl 16 vss 15 qop1r 14 13 mics 7 micr 8 qmicr 9 iop1r 10 11 12 24 qop1l 23 vneg 22 cpn 21 gnd 20 cpp 19 qmicl micl iled vbat iop1l vneg or open 25 AS3430 qfn 32pin iop1l 1 qlinl 2 qmicl 3 agnd 4 linl 5 linr 6 vol_csda 7 vbat 24 hpvdd 23 hpr 22 hpvss 21 hpl 20 vss 19 qop2r 18 micl 9 iled 10 mics 11 micr 12 qmicr 13 qlinr 14 iop1r 15 qop1r 16 n.c. 32 qop1l 31 iop2l 30 qop2l 29 vneg 28 cpn 27 gnd 26 cpp 25 mode_cscl 8iop2r 17 exposed pad: vneg or open 33 www.austriamicrosystems.com revision 1.02 6 - 51 as3400 as3410 AS3430 1v0 data sheet - pin assignments 4.1 pin descriptions note: pin description may change in preliminary data sheets. table 1. pin description for as3400 as3410 AS3430 pin name pin number type description as3400 as3410 AS3430 iop1l - 24 1 ana in filter opamp1 input left channel qlinl - - 2 ana out line in gainstage output left channel qmicl 24 1 3 ana out mic gainstage output right channel agnd 1 2 4 ana in analog reference linl 235 ana in dig in line in left channel during appl trim mode write ? csda during appl trim mode burn ? vneg linr 346 ana in dig io linein right channel during appl trim mode write ? cscl during appl trim mode burn ? clock vol_csda 4 5 7 mixed io serial interface data adc input for volume regulation mode_cscl 5 6 8 dig in mode pin (powerup/dn, monitor) serial interface clock micl 6 7 9 ana in microphone in left channel iled - 8 10 ana out current output for on-indication led mics 7 9 11 ana out microphone supply micr 8 10 12 ana in microphone input right channel qmicr 9 11 13 ana out mic gainstage output right channel qlinr 10 - 14 ana out line in gainstage output right channel iop1r 11 12 15 ana in filteropamp1 input right channel qop1r 121316 ana in filter opamp1 output right channel iop2r 13 - 17 ana in filter opamp2 input right channel qop2r 14 - 18 ana out filter opamp2 output right channel vss 15 14 19 sup in core and periphery circuit vss supply hpl 161520 ana out headphone output left channel hpvss - - 21 sup in headphone vss supply hpr 171622 ana out headphone output right channel hpvdd 181723 sup in headphone vdd supply vbat 191824 sup in vneg chargepump positive supply n.c. - - 25 - cpp 201926 ana out vneg chargepump flying capacitor positive terminal gnd 212027 gnd vneg chargepump negative supply cpn 222128 ana out vneg chargepump flying capacitor negative terminal vneg 23 22 29 sup io vneg chargepump output www.austriamicrosystems.com revision 1.02 7 - 51 as3400 as3410 AS3430 1v0 data sheet - pin assignments qop2l - - 30 ana out filter opamp2 output left channel iop2l - - 31 ana in filter opamp2 input left channel qop1l - 23 32 ana out filter opamp1 output right channel 25 25 33 exposed pad: connect to vneg or leave it unconnected table 1. pin description for as3400 as3410 AS3430 pin name pin number type description as3400 as3410 AS3430 www.austriamicrosystems.com revision 1.02 8 - 51 as3400 as3410 AS3430 1v0 data sheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in electrical characteristics on page 9 is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. the device should be operated under recommended o perating conditions. table 2. absolute maximum ratings parameter min max units comments reference ground defined as in gnd supply terminals -0.5 2.0 v applicable for pin vbat, hpvdd ground terminals -0.5 0.5 v applicable for pins agnd negative terminals -2.0 0.5 v applicable for pins vneg, vss, hpvss voltage difference at vss terminals -0.5 0.5 v applicable for pins vss, hpvss pins with protection to vbat vneg -0.5 5.0 vbat+0.5 v applicable for pins cpp, cpn pins with protection to hpvdd vss -0.5 5.0 hpvdd+0.5 v applicable for pins linl/r, micl/r, iled, hpr, hpl, qmicl/r, qlinl/r, iopx, qopx other pins vss -0.5 5 applicable for pins mics, vol_csda, mode_cscl input current (lat ch-up immunity) -100 100 ma norm: jedec 17 continuous power dissipation (t a = +70oc) continuous power dissipation -200mw p t 1 for qfn16/24/32 package 1. depending on actual pcb layout and pcb used electrostatic discharge electrostatic discharge hbm +/-2 kv norm: jedec jesd22-a114c temperature ranges and storage conditions junction temperature +110 oc storage temperature range -55 +125 oc humidity non-condensing 585% moisture sensitive level 3 represents a max. floor life time of 168h package body temperature 260 oc the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/ jedec j-std-020?moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices?. www.austriamicrosystems.com revision 1.02 9 - 51 as3400 as3410 AS3430 1v0 data sheet - electrical characteristics 6 electrical characteristics vbat = 1.0v to 1.8v, t a = -20oc to +85oc. typical values are at vbat = 1.5v, t a = +25oc, unless otherwise specified. table 3. electrical characteristics symbol parameter condition min max unit t a ambient temperature range -20 +85 c supply voltages gnd reference ground 00v vbat, hpvdd battery supply voltage normal operation with mode pin high 1.0 1.8 v two wire interface operation 1.4 1.8 v vneg chargepump voltage -1.8 -0.7 v vss analog neg. supply voltages hpvss, vss, vneg -1.8 -0.7 v v delta - difference of ground supplies gnd, agnd to achieve good performance, the negative supply terminals should be connected to low impedance ground plane. -0.1 0.1 v v delta -- difference of negative supplies vss, vneg, hpvss charge pump output or external supply -0.1 0.1 v v delta + difference of positive supplies vbat-hpvdd -0.25 0.25 v other pins v mics microphone supply voltage mics 0 3.6 v v hpvdd pins with diode to hpvdd micl/r, iled, hpr, hpl, qmicl/r, qlinl/ r, iopx, qopx vss 3.6 v v vbat pins with diode to vbat cpp, cpn vneg vbat v v control control pins mode_cscl, vol_csda vss 3.7 v v trim line input & application trim pins linl, linr vneg -0.5 or -1.8 hpvdd +0.5 or 1.8 v symbol parameter condition min typ max unit i leak leakage current vbat<0.8v 20 a vbat<0.6v 10 a block power requirements @ 1.5v vbat i sys reference supply current bias generation, oscillator, iled current sink, adc6 0.25 ma i lin linein gain stage current no signal, stereo 0.64 ma i mic mic gain stage current no signal, stereo 2.10 ma i hp headphone stage current no signal 1.70 ma i vneg vneg charge pump current no load 0.25 ma i mics mics charge pump current no load 0.06 ma i min minimal supply current sum of all above blocks 5.00 ma i op1 op1 supply current no load 0.64 ma i op2 op2 supply current no load 0.64 ma i iled iled current sink current 100% duty cycle 2.50 ma i micb microphone bias current 200a per microphone via charge pump 1.30 ma www.austriamicrosystems.com revision 1.02 10 - 51 as3400 as3410 AS3430 1v0 data sheet - typical operating characteristics 7 typical operating characteristics vbat = +1.5v, t a = +25oc, unless otherwise specified. figure 6. lin to hph: thd+n vs. output power figure 7. vneg charge pump thd+n vs pout - 32 ? - stereo single ended 0,01 0,1 1 0 5 10 15 20 25 30 35 40 pout [mw] thd+n [%] vbat=1.8v vbat=1.5v vbat=1.0v t hd+n vs pout - 16 ? - single ended stereo 0,01 0,1 1 0 102030405060 pout [mw] thd+n [%] vbat=1.8v vbat=1.5v vbat=1.0v thd+n vs pout - 32 ? - bridged-tied load 0,01 0,1 1 0 102030405060708090100110120130 pout [mw] thd+n [%] vbat=1.8v vbat=1.5v vbat=1.0v thd+n vs pout - 64 ? - bridged-tied load 0,01 0,1 1 0 102030405060708090 pout [mw] thd+n [%] vbat=1.8v vbat=1.5v vabt=1.0v vneg cp voltage vs load current -1,8 -1,6 -1,4 -1,2 -1,0 -0,8 -0,6 -0,4 -0,2 0,0 0 50 100 150 200 i_vneg [ma] v_vneg [v] vbat=1.0v vbat=1.5v vbat=1.8v vneg cp efficiency 50 55 60 65 70 75 80 85 90 95 100 0 20 40 60 80 100 120 140 160 180 200 i_vneg [ma] eff [%] vbat=1.0v vbat=1.5v vbat=1.8v www.austriamicrosystems.com revision 1.02 11 - 51 as3400 as3410 AS3430 1v0 data sheet - typical operating characteristics figure 8. microphone supply generation figure 9. iled current sink (100% pwm setting) mics charge pump 0 0,5 1 1,5 2 2,5 3 3,5 0 500 1000 1500 2000 i_mics [ua] v_mics [v] vbat=1.8v vbat=1.5v vabt=1.0v i_mics vs di_vbat 0 1000 2000 3000 4000 5000 6000 7000 0 500 1000 1500 2000 i_mics [ua] di_vbat [ua] vbat=1.8v vbat=1.5v vbat=1.0v v_mics vs v_vbat 1,5 1,7 1,9 2,1 2,3 2,5 2,7 2,9 3,1 3,3 3,5 0,9 1,0 1,1 1,2 1,3 1,4 1,5 1,6 1,7 1,8 vbat [v] v_mics [v] i_mcs = 0.0ua i_mics = 600ua r_mics_switch vs v_vbat 40 50 60 70 80 90 100 110 120 130 140 0,9 1,0 1,1 1,2 1,3 1,4 1,5 1,6 1,7 1,8 vbat [v] r_mics_switch [ ? ] iled current 0,0 20,0 40,0 60,0 80,0 100,0 120,0 0,00,10,20,30,40,5 v (iled-vneg) [v] i (iled) [% ] iled (vbat=1.8v) iled (vbat=1.5v) iled (vbat=1.0v) iled current 0,0 20,0 40,0 60,0 80,0 100,0 120,0 0,0 0,5 1,0 1,5 2,0 2,5 3,0 v (iled-vneg) [v] i (iled) [% ] iled (vbat=1.8v) iled (vbat=1.5v) iled (vbat=1.0v) www.austriamicrosystems.com revision 1.02 12 - 51 as3400 as3410 AS3430 1v0 data sheet - typical operating characteristics figure 10. thd vs. frequency @ 1.5v, 16 , 25mw figure 11. typical performance data, ff configuration www.austriamicrosystems.com revision 1.02 13 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description 8 detailed description this section provides a detailed description of the device related components. 8.1 audio line input the chip features one line input. the blocks can work in mono differential or in stereo single ended mode. in addition to the 12.5-25k input impedance, linein has a termination resistor of 10k which is also effective during mute to charge eventually given input capacitors. 8.1.1 gain stage the line in gain stage is designed to have 63 gain steps of 0.75db with a max gain of 0db plus mute. in default, the gain will be ramped up from mute to 0db during startup. there is a possibility to make the playback volume user controlled by the vol pin with an adc converted vol voltage or up/dn buttons. in monitor mode, the gain stage can be set to an fixed default attenuation level for reducing the loudness of the music. figure 12. line inputs 8.1.2 parameter vbat=1.5v, t a = 25oc, unless otherwise specified. table 4. line input parameter symbol parameter condition min typ max unit v lin input signal level 0.6* vbat vbat v peak r lin input impedance 0db gain (12.5k // 10k) 5.6 k ? -46.5db gain (25k // 10k) 7.2 k ? mute 10 k ? rlin input impedance tolerance 30 % c lin input capacitance 5pf a lin programmable gain -46.5 +0 db gain steps discrete logarithmic gain steps 0.75 db gain step accuracy 0.5 db a linmute mute attenuation 100 db agnd linl stereo mode linr 10k 10k 12.5k k 12.5k k qlinr qlinl mute mute agnd linl mono differential mode linr 10k 10k 12.5k k 12.5k k qlinr qlinl mute mute agnd www.austriamicrosystems.com revision 1.02 14 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description 8.2 microphone input the afe offers two microphone inputs and one low noise microphone voltage supply (microphone bias). the inputs can be switched to single ended or differential mode. figure 13. microphone input 8.2.1 gain stage & limiter the mic gainstage has programmable gain within -6db?+41.625db in 128 steps of 0.375db. as soft-start function is implemented for an automatic gain ramping implemented with steps of 4ms to fade in the audio at the e nd of the start-up sequence. a limiter automatically attenuates high input signals. the agc has 127 steps with 0.375db with a dynamic range of the full gain stage. in monitor mode, the gain stage can be set to an fixed (normally higher) gain level or be controlled by the vol pin. 8.2.2 supply the mics charge pump is providing a pro per microphone supply voltage for the aaa suppl y. since aaa batteries are operating down to 1.0v, the direct battery voltage cannot be used for mic-supply. there are 2 modes. the first mode switch-mode for 1.8v supply is to have just a switch from vbat to mics. with this switch, the microphone current is switched off in idle mode. the second mode charegpump_mode for aaa batteri es is the real charge pump mode, in this mode a posi tive voltage is generated of about 2* vbat. it is also possible to switch off the microphone supply if not needed (e.g. playback without anc) alin gain ramp rate potimode, tinit=100ms 20 ms/step buttonmode, tinit=400ms 80 monitormode 8 v attack limiter activation level hpl/r start of neg. clipping v peak v decay limiter release level hpl/r vneg +0.3 v peak t attack limiter attack time 4s t decay limiter decay time 8ms table 4. line input parameter (continued) symbol parameter condition min typ max unit agnd micl stereo mode micr qmicr qmicl mono differential mode agnd micl micr qmicr qmicl agnd www.austriamicrosystems.com revision 1.02 15 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description 8.2.3 parameter vbat=1.5v, t a = 25oc unless otherwise specified. table 5. microphone input parameter symbol parameter condition min typ max unit v micin 0 input signal level a mic = 30db 20 mv p v micin 1a mic = 36db 10 mv p v micin 2a mic = 42db 5 mv p r micin input impedance micp to agnd 7.5 k micin input impedance tolerance -7 +33 % c micin input capacitance 5pf a mic programmable gain -6 +41.6 db gain steps discrete logarithmic gain steps 0.375 db gain step precision 0.15 db amic gain ramp rate tinit=64ms 4 ms/step v attack limiter activation level v peak related to vbat or vneg 0.67 1 v decay limiter release level 0.4 1 a miclimit limiter gain overdrive 127 @ 0.375db 41.625 db t attack limiter attack time 5s/step t decay-deb limiter decay debouncing time 64 ms t decay limiter decay time 4ms/step v mics microphone supply voltage vbat*2- 240mv v i micsmin min. microphone supply current vbat=+1.0v vneg=-0.7v mics=+1.75v 650 a r out_cp cp output resistance 1300 www.austriamicrosystems.com revision 1.02 16 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description 8.3 headphone output the headphone output is a true ground output using vneg as negat ive supply, designed to provide the audio signal with 2x12mw @ 16 -64 , which are typical values for headphones. it is also capable to operate in bridged mode for higher impedance (e.g. 300 ) headphone. in this mode the left output is carrying the inverted signal of the right output shown in figure 15 . figure 14. headphone output single ended mode figure 15. headphone output differential mode 8.3.1 input multiplexer the signal from the line-input gain stage gets summed at the input of the headphone stage with the microphone gain stage output , the first filter opamp output or the second filter opamp output. the microphone gain stage output is used per default. it is also possible to pl ayback without anc by only using the line-input gain stage with no other signal on the multiplexer. for the monitor mode, the setting of this input multiplexer can be changed to another source, normally to the microphone. 8.3.2 no-pop function the no-pop startup of the headphone stage takes 60ms to 120ms dependent on the supply voltage. 8.3.3 no-clip function the headphone output stage gets monitored by comparator stages which detect if the output signal starts to clip. this signal is used to reduce the linein gain to avoid distortion of the output signal. a hystereses avoids jumping between 2 g ain steps for a signal with constant amplitude. pop click control hpr hpl agnd lineinr mux qop2r qop1r qmicr lineinl mux qop2l qop1l qmicl hpvss hpvdd open open linein gain stage www.austriamicrosystems.com revision 1.02 17 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description 8.3.4 over-current protection the over-current protection has a threshold of 150-200ma and a debouncing time of 8s. the stage is forced to off mode in an ov er-current situation. after this, the headphone stage tries to power up again every 8ms as long as the over-current situation still exists or the stage is turned off manually. 8.3.5 parameter vbat=1.5v, t a = 25oc, unless otherwise specified. 8.4 operational amplifier while as3410 offers only one operational amplifier for feed-forward anc, as3400 and AS3430 feature an additional second operati onal amplifier stage to perform feed-back anc or any other additional needed filtering. both operational amplifiers stages can be activated and used individually. while op1 stage is always configured as inverting am plifier, op2 stage can be also switched to a non-inverting mode with an adjustable gain of 0...+10.5db. figure 16. operational amplifiers table 6. headphone output parameter symbol parameter condition min typ max unit r l_hp load impedance stereo mode 16 c l_hp load capacitance stereo mode 100 pf p hp nominal output power rl=64 12 mw rl=32 24 mw rl=16 34 mw p srrhp power supply rejection ratio 200hz-20khz, 720mvpp, rl=16 ? 90 db agnd iop1l op1 iop1r qop1r qop1l iop2l op2 non-inverting mode iop2r qop2r qop2l agnd 0..10.5db agnd 0..10.5db agnd iop2l op2 inverting mode iop2r qop2r qop2l www.austriamicrosystems.com revision 1.02 18 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description 8.4.1 parameter vbat=1.5v, t a = 25oc, unless otherwise specified. table 7. headphone output parameter symbol parameter condition min typ max unit r l_op load impedance single ended 1 k c l_op load capacitance single ended 100 pf gbw op gain band width 4.3 mhz v os_op offset voltage 6mv v ein_hp equivalent input noise 200hz-20khz 2.6 v www.austriamicrosystems.com revision 1.02 19 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description 8.5 system the system block handles the power up and power down sequencing, as well as, the mode switching. 8.5.1 power up/down conditions the chip powers up when one of the following conditions is true: the chip automatically shuts off if one of the following conditions arises: 8.5.2 start-up sequence the start-up sequence depends on the used mode. in stand-alone mode the sequence runs automatically, in i2c mode the sequence runs till a defined state and waits then for an i 2c command. either the automatic sequence is started by setting the cont_pwrup bit in addition to the pwr_hold bit. if only the pwr_hold is set all enable bits for headphone, microphone, etc have to be set manually. figure 17. stand-alone mode start-up sequence table 8. power up conditions # source description 1mode pin in stand-alone mode, mode pin has to be driven high to turn on the device 2 i2c start in i2c mode, a i2c start condition turns on the device table 9. power down conditions # source description 1mode pin power down by driving mode pin to low 2serif power down by serif writing 0h to register 20h bit <0> 3 low battery power down if vbat is lower than the supervisor off-threshold 4vneg cp ovc power down if vneg is higher than the vneg off-threshold www.austriamicrosystems.com revision 1.02 20 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description figure 18. i2c mode start-up sequence the total start-up time (inlcuding fade-in of the gain stages) can be reduced from 900ms to 600ms by otp setting. 8.5.3 mode switching when the chip is in stand-alone mode (no i2c control), the mode can be switched with different levels on the mode pin. in i2c mode, the monitor mode can be activated be setting the corresponding bit in the system register. table 10. operation modes mode mode pin description off low (vss) chip is turned off anc high (vbat) chip is turned on and active noise cancellation is active monitor vbat/2 chip is turned on and monitor mode is active in monitor mode, a different (normally higher) microphone preamplifier gain can be chosen to get an amplification of the surrounding noise. this volume can be either fixed or be controlled by the vol input. to get rid of the low pass filtering needed for the noise cancellation, the headphone input multiplexer can be set to a different (normally to mic) source. in addition, the linein gain can be lowered to reduce the loudness of the music currently played back. www.austriamicrosystems.com revision 1.02 21 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description 8.5.4 status indication as3410and AS3430 features a on-status information via the current output pin iled. the current can be controlled in 3 steps and be switched off, by setting the pwm to 0%, 25%, 50% or 100% duty cycle of a 50khz signal. if low_bat is active, iled switches to blinking with 1hz, 50% duty cycle and 50% current setting. 8.6 vneg charge pump the vneg charge pump uses one external 1uf capacitor to generate a negative supply voltage out of the battery input voltage to supply all audio related blocks. this allows a true-ground headphone output with no more need of external dc-decoupling capacitors. 8.6.1 parameter vbat=1.5v, t a = 25oc, unless otherwise specified. 8.7 otp memory & internal registers the otp memory consists of otp register and the otp fuses.the otp register can be written as often as wanted but will lose the content on power off. the otp fuses are intended to store basic chip configurations as well as the microphone gain settings to optimize th e anc performance and get rid of sensitivity variations of different microphones. burning the fuses can only be done once and is a pe rmanent change, which means the fuses keep the content even if the chip is powered down. this as3400/10/30 offers 4 register set for storing th e microphone gain making it possible to change the gain 3 times for re-calibration or other purposes. when the chip is controlled by a microcontroller via i2c, the otp memory don?t has to be used. 8.7.1 register & otp memory configuration figure 19 is showing the principal register interaction. figure 19. register access table 11. headphone output parameter symbol parameter condition min typ max unit v in input voltage vbat 1.0 1.5 1.8 v v out output voltage vneg -0.7 -1.5 -1.8 v c ext external flying capacitor 1f otp register 10h...16h; 30h...35h otp fuses burn load register 0x8,0x9,0xa 0xb, 0xc, 0x21 otp write otp read i2c if normal i2c write normal i2c read register 8h...21h otp path is default but can be switched by register setting www.austriamicrosystems.com revision 1.02 22 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description registers 0x8, 0x9, 0xa, 0xb, 0xc and 0x21 have only effect when the corresponding ?reg_on? bit is set, otherwise the chip oper ates with the otp register settings which are loaded from the otp fuses at every start-up. all registers settings can be changed several times, but will loose the content on power off. when using the i2c mode, the chip configuration has to be loaded from the microcontroller after every start-up. in stand alone mode the otp fuses have to be programmed for a perma nent change of the chip configuration. a single otp cell can be programmed only once. per default, the cell is ?0?; a programmed cell will contain a ?1?. while it is not possible to reset a programmed bit from ?1? to ?0?, multiple otp writes are possi ble, but only additional unprogrammed ?0?-bits can be programmed to ?1?. independent of the otp programming, it is possible to overwrite t he otp register temporarily with an otp write command at any t ime. this setting will be cleared and overwritten with the hard programmed ot p settings at each power-up sequence or by a load operation. the otp memory can be accessed in the following ways: load operation. the load operation reads the otp fuses and loads the contents into the otp register. a load operation is automatically executed after each power-on-reset. write operation. the write operation allows a temporary modification of the otp register. it does not program the otp. this operation can be invoked multiple times and will remain set while the chip is supplied with power and while the otp register is not modif ied with another write or load operation. read operation. the read operation reads the contents of the otp register, for example to verify a write command or to read the otp memory after a load command. burn operation. the burn operation programs the contents of the otp register permanently into the otp fuses. don?t use old or nearly empty batteries for burning the fuses. attention: if you once burn the otp_lock bit, no further programming, e.g. setting additional ?0? to ?1?, of the otp can be done. for production, the otp_lock bit must be set to avoid an unwanted change of the otp content during the livetime of the product. 8.7.2 otp fuse burning in most stand alone applications, the i2c pins are not accessible. burning the fuses can be done by switching the line inputs i nto a special mode to access the chip by i2c over the line input connections. this allows trimming of the microphone gain with no openings in the final housing and so no influence to the acoustic of the headset. this mode is called ?application trimm? mode, or short ?apt?. (patent pending) during the application trimm mode linr has to provide the clock, while linl has to provide the data for the i2c communication. please note that the otp register cannot be accessed directly but have to be enabled before a read or write access. this is ind ependent whether you access the otp register via the normal i2c pins or in application trimm mode via linl and linr. please refer to the detaile d register description to get more information on how the registers can be accessed. to achieve a proper burning of the fuses, the negative supply has to be buffered by applying an external negative supply during burning. this voltage can also be applied to the linl terminal. an internal switch is connecting linl and vneg during the fuse burning. linr has to provide the clock for burning the fuses. the below flow chart shows the principle steps of the otp burning process. the application trimm mode can only be entered at a specific timing during the start-up sequence. the device offers the possibility to change microphone gain settings 3 times by using alternative registers. the selection whic h register set is being used to set the microphone gain is done by the ?lock? bits of the corresponding registers. a more detailed description of the individual steps is available in an application note. www.austriamicrosystems.com revision 1.02 23 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description figure 20. otp burning process 8.8 2-wire-serial control interface there is an i2c slave block implemented to have access to 64 byte of setting information. the i2c address is: adr_group8 - audio processors 8eh_write 8fh_read 8.8.1 protocol table 12. 2-wire serial symbol definition symbol definition rw note s start condition after stop r1 bit sr repeated start r1 bit dw device address for write r 1000 1110b (8eh) dr device address for read r 1000 1111b (8fh) wa word address r8 bit enter ?application trimm? mode anc pre burning measurements main_lock set? write, burn otp fuses 30-35h, 16-17h set main_lock and seq_lock n y y n verification ok? leave ?application trimm? mode device trimming failed leave ?application trim? mode anc post burning measurements device trimming succeeded y n verification ok? trimm verification alt1_lock set? mic trimm #2 write, burn otp fuses 10-11h set alt1_lock n y alt2_lock set? mic trimm #3 write, burn otp fuses 12-13h set alt2_lock n y alt3_lock set? mic trimm #4 write, burn otp fuses 14-15h set alt3_lock n y no further mic trimming possible leave ?application trimm? mode www.austriamicrosystems.com revision 1.02 24 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description figure 21. byte write figure 22. page write byte write and page write formats are used to write data to the slave. the transmission begins with the start condition, which is generated by the master when the bus is in idle state (the bus is fr ee). the device- write address is followed by the word address. after the word address any number of data bytes can be sent to the slave. the wo rd address is incremented internally, in order to write subsequent data bytes on subsequent address locations. for reading data from the slave device, the master has to change the transfer direction. this can be done either with a repeate d start condition followed by the device-read address, or simply with a new transmission start followed by the device-read address, when the bus is in idle state. the device-read address is always followed by the 1st register byte transmitted from the slave. in read mode any number of subsequent register bytes can be read from the slave. the word address is incremented internally. a acknowledge w1 bit n no acknowledge r1 bit reg_data register data/write r8 bit data (n) register data/read w8 bit p stop condition r1 bit wa++ increment word address internally r during acknowledge as3400 as3410 AS3430 (=slave) receives data as3400 as3410 AS3430 (=slave) transmits data table 12. 2-wire serial symbol definition symbol definition rw note s dw a wa a reg_data a p write register wa++ s dw a wa a reg_data 1 a p write register wa++ reg_data 2 a write register wa++ reg_data n a write register wa++ ... www.austriamicrosystems.com revision 1.02 25 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description figure 23. random read random read and sequential read are combined formats. the repeated start condition is used to change the direction after the da ta transfer from the master. the word address transfer is initiated with a start condition issued by the master while the bus is idle. the start condition i s followed by the device-write address and the word address. in order to change the data direction a repeated start condition is issued on the 1st scl pulse after the acknowledge bit of th e word address transfer. after the reception of the device-read address, the slave becomes the transmitter. in this state the slave transmits register data located by the previous received word address vector. the master responds to the data byte with a not-acknowledge, and issues a stop co ndition on the bus. figure 24. sequential read sequential read is the extended form of random read, as more than one register-data bytes are transferred subsequently. in diff erence to the random read, for a sequential read the transferred register-data bytes are responded by an acknowledge from the master. the num ber of data bytes transferred in one sequence is unlimited (consider the behavior of the word-address counter). to terminate the transmissi on the master has to send a not-acknowledge following the last data byte and generate the stop condition subsequently. figure 25. current address read to keep the access time as small as possible, this format allows a read access without the word address transfer in advance to the data transfer. the bus is idle and the master issues a start condition followed by the device-read address. analogous to random read, a single byte transfer is terminated with a not-acknowledge after the 1st register byte. analogous to sequential read an unlimited number of data bytes can be transferred, where the data bytes has to be responded with an acknowledge from the master. for termination of the transmissi on the master sends a not-acknowledge following the last data byte and a subsequent stop condition. s dw a wa a n a read register wa++ data sr dr p s dw a wa a n a read register wa++ data sr dr p reg_data 2 a read register wa++ reg_data n ... a read register wa++ s n a read register wa++ data dr p reg_data 2 a read register wa++ reg_data n ... a read register wa++ www.austriamicrosystems.com revision 1.02 26 - 51 as3400 as3410 AS3430 1v0 data sheet - detailed description 8.8.2 parameter figure 26. 2-wire serial timing vbat >=1.4v 1 , t a =25oc, unless otherwise specified. table 13. 2-wire serial parameter symbol parameter condition min typ max unit v csl cscl, csda low input level (max 30%dvdd) 0 - 0.87 v v csh cscl, csda high input level cscl, csda (min 70%dvdd) 2.03 - 5.5 v hyst cscl, csda input hysteresis 200 450 800 mv v ol csda low output level at 3ma - - 0.4 v tsp spike insensitivity 50 100 - ns t h clock high time max. 400khz clock speed 500 ns t l clock low time max. 400khz clock speed 500 ns t su csda has to change tsetup before rising edge of cscl 250 - - ns t hd no hold time needed for csda relative to rising edge of cscl 0--ns ts csda h hold time relative to csda edge for start/stop/rep_start 200 - - ns t pd csda prop delay relative to lowgoing edge of cscl 50 ns 1. serial interface operates down to vbat = 1.0v but with 100khz clock speed and degraded parameters. 8 1-7 cscl csda 8 9 8 1-7 8 9 8 1-7 8 9 start condition address r/w ack data ack data ack stop condition ts t su t h t l t hd t pd www.austriamicrosystems.com revision 1.02 27 - 51 as3400 as3410 AS3430 1v0 data sheet - register description 9 register description table 14. i2c register overview addr name b7 b6 b5 b4 b3 b2 b1 b0 audio registers 00-07h reserved 08h mic_l mic_mode 0: stereosingleend 1: monodiff micl_vol<6:0> gain from micl to qmicl or mixer = -6db...+41.6db; 127 steps of 0.375db 09h mic_r mic_reg_on 0: use reg 30h & 31h 1: use reg 08h & 09h micr_vol<6:0> gain from micr to qmicr or mixer = -6db...+41.6db; 127 steps of 0.375db 0ah line_in lin_reg_on 0: use reg 33h and vol pin 1: use reg 0ah lin_mode 0: stereosingleend 1: monodiff lin_vol<5:0> 0: mute; 0x01..0x3f: gain from linr/l to qlinr/l or mixer = -46.5db...+0db; 63 steps of 0.75db 0bh gp_op_l hp_mux<1:0> 0: mic; 1: op1; 2: op2; 3: open op2l<3:0> 0: op2l inverting mode; 0x1..0xf: op2l non inverting mode gain = 0...10.5db; 15 steps of 0.75db op2l_on op1l_on 0ch gp_op_r op_reg_on 0: use reg 34h 1: use reg 0bh & 0ch hp_mode 0: stereosingleend 1: monodiff op2r<3:0> 0: op2r inverting mode; 0x1..0xf: op2r non inverting mode gain = 0...10.5db; 15 steps of 0.75db op2r_on op1r_on 0dh-0fh reserved 18h-1fh reserved system register 20h system design_version<3:0> 0100 reg3 f_on monitor_on cont_pwrup pwr_hold 21h pwr_set pwr_reg_on 0: - 1: use reg 21h iled<1:0> 0: off; 1: 25%; 2: 50%; 3: 100% hp_on mic_on lin_on mics_cp_on mics_on low_bat pwrup_ complete 22h-2fh reserved www.austriamicrosystems.com revision 1.02 28 - 51 as3400 as3410 AS3430 1v0 data sheet - register description otp register 10h anc_l2 test_bit_5 micl_vol_otp2<6:0> gain from micl to qmicl or mixer = mute, -5.625db...+41.6db; 127 steps of 0.375db 11h anc_r2 alt1_lock micr_vol_otp2<6:0> gain from micr to qmicr or mixer = mute, -5.625db...+41.6db; 127 steps of 0.375db 12h anc_l3 test_bit_6 micl_vol_otp3<6:0> gain from micl to qmicl or mixer = mute, -5.625db...+41.6db; 127 steps of 0.375db 13h anc_r3 alt2_lock micr_vol_otp3<6:0> gain from micr to qmicr or mixer = mute, -5.625db...+41.6db; 127 steps of 0.375db 14h anc_l4 test_bit_7 micl_vol_otp4<6:0> gain from micl to qmicl or mixer = mute, -5.625db...+41.6db; 127 steps of 0.375db 15h anc_r4 alt3_lock micr_vol_otp4<6:0> gain from micr to qmicr or mixer = mute, -5.625db...+41.6db; 127 steps of 0.375db 16h mics_cntr lowbat + 100mv 17h pwrup seq_lock fast_start<4:0> 0: ~900ms; 0eh: ~600ms lin_agc_off mic_agc_off 30h anc_l test_bit_1 micl_vol_otp<6:0> gain from micl to qmicl or mixer = mute, -5.625db...+41.6db; 127 steps of 0.375db 31h anc_r test_bit_2 micr_vol_otp<6:0> gain from micr to qmicr or mixer =mute, -5.625db...+41.6db; 127 steps of 0.375db 32h mic_mon mon_mode 0: fixed volume 1: adj. volume mic_mon_otp<6:0> gain from micl/r to qmicl/r or mixer = mute, -5.625 db...+41.6db; 0.375db steps, if mon_mode is set to 0 gain from micl/r to qmicl/r or mixer = mute, -5.625db...+41.6db; 0.375db steps, adjustable by vol pin if mon_mode is set to 1 33h audio_set vol_pin_off vol_pin_ mode 0: potentiometer 1: up/down button lin_mode_ otp 0: stereosingleend 1: monodiff mic_mode_ otp 0: stereosingleend 1: monodiff hp_mode_ otp 0: stereosingleend 1: monodiff lin_mon_atten<2:0> 0: no attenuation; 1..6: lin_vol<6:0> sh ift by -6db...-36db 7: mute 34h gp_op hp_mux_otp<1:0> 0: mic; 1: op1; 2: op2; 3: - op2_otp<3:0> 0: op2 inverting mode; 0x1..0xf: op2 non inverting mode gai n = 0...10.5db; 15 steps of 0.75db op2_on_otp op1_on_otp 35h otp_sys main_lock 0: write reg 30h.. 35h 1: lock reg 30h..35h test_bit_3 mon_hp_mux<1:0> 0: mic; 1: op1; 2: op2; 3: - iled_otp<1:0> 0: off; 1: 25%; 2: 50%; 3: 100% mics_cp_off i2c_mode 3eh config_1 extburnclk 3fh config_2 tm34 burnsw tm_reg34-35 tm_reg30-33 otp_mode<1:0> 0: read; 1: load; 2: write; 3: burn table 14. i2c register overview addr name b7 b6 b5 b4 b3 b2 b1 b0 www.austriamicrosystems.com revision 1.02 29 - 51 as3400 as3410 AS3430 1v0 data sheet - register description table 15. mic_l register name base default mic_l 2-wire serial 00h offset: 08h left microphone input register configures the gain for the left microphone input and defines the microphone operation mode. this register is reset at por. bit bit name default access bit description 7 mic_mode 0 r/w selects the microphone input mode 0: single ended stereo mode 1: mono differential mode 6:0 micl_vol<6:0> 000 0000 r/w volume settings for left microphone input, adjustable in 127 steps of 0.375db 00 0000: mute 00 0001: -5.625db gain 00 0010: -5.25 db gain .. 11 1110: 41.250db gain 11 1111: 41.625 db gain table 16. mic_r register name base default mic_r 2-wire serial 00h offset: 09h right microphone input register configures the gain for the right microphone input and enables register 08h & 09h. this register is reset at por. bit bit name default access bit description 7 mic_reg_on 0 r/w defines which register s are used for the microphone settings. 0: settings of register 30h and 31h are used 1: settings of register 08h and 09h are used 6:0 micr_vol<6:0> 000 0000 r/w volume settings for right microphone input, adjustable in 127 steps of 0.375db 00 0000: mute 00 0001: -5.625db gain 00 0010: -5.25 db gain .. 11 1110: 41.250db gain 11 1111: 41.625 db gain www.austriamicrosystems.com revision 1.02 30 - 51 as3400 as3410 AS3430 1v0 data sheet - register description table 17. line_in register name base default line_in 2-wire serial 00h offset: 0ah line input register configures the attenuation for the line input, defines the line input operation mode and enables register 0ah. this register is reset at por. bit bit name default access bit description 7 lin_reg_on 0 r/w defines which source is used for the line input settings. 0: settings of register 33h and vol pin are used 1: register 0ah is used 6 lin_mode 0 r/w selects the line input mode 0: single ended stereo mode 1: mono differential mode 5:0 lin_vol<5:0> 00 0000 r/w volume settings for line input, adjustable in 63 steps of 0.75db 00 0000: mute 00 0001:-46.5db gain 00 0010:-45.75db gain .. 11 1110:-0.75db gain 11 1111:.0 db gain table 18. gp_op_l register name base default gp_op_l 2-wire serial 00h offset: 0bh left general purpose operational amplifier register enables the left opamp stages, defines opamp 2 mode and gain and sets the hp input multiplexer. this register is reset at por. bit bit name default access bit description 7:6 hp_mux<1:0> 00 r/w multiplexes the analog audio signal to hp amp 00: mic: selects qmicl/r output 01: op1: selects qop1l/r outputs 10:op2: selects qop2l/r output 11: open: no signal mixed together with the line input signal 5:2 op2l<3:0> 0000 r/w mode and volume settings for left op2, adjustable in 15 steps of 0.75db 0000: op2l in inverting mode 0001: 0 db gain, op2l in non inverting mode 0001: 0.75 db gain, non inverting .., 1110: 9.75db gain, non inverting 1111:.10.5 db gain, non inverting 1 op2l_on 0 r/w enables left op 2 0: left op2 is switched off 1: left op2 is enabled 0 op1l_on 0 r/w enables left op 1 0: left op1 is switched off 1: left op1 is enabled www.austriamicrosystems.com revision 1.02 31 - 51 as3400 as3410 AS3430 1v0 data sheet - register description table 19. gp_op_r register name base default gp_op_r 2-wire serial 00h offset: 0ch right general purpose operational amplifier register enables the right opamp stages, defines opamp 2 mode and gain and sets the hp mode. this register is reset at por. bit bit name default access bit description 7 op_reg_on 0 r/w defines which register is used for the opamp and hp settings. 0: settings of register 33h and 34h are used 1: register 0b and 0ch are used 6 hp_mode 0 r/w selects the line input mode 0: single ended stereo mode 1: mono differential mode 5:2 op2r<3:0> 0000 r/w mode and volume settings for right op2, adjustable in 15 steps of 0.75db 0000: op2r in inverting mode 0001: 0 db gain, op2r in non inverting mode 0001: 0.75 db gain, non inverting .., 1110: 9.75db gain, non inverting 1111:.10.5 db gain, non inverting 1 op2r_on 0 r/w enables right op 2 0: right op2 is switched off 1: right op2 is enabled 0 op1r_on 0 r/w enables right op 1 0: right op1 is switched off 1: right op1 is enabled table 20. system register name base default system 2-wire serial 31h offset: 20h system register this register is reset at a por. bit bit name default access bit description 7:4 design_version<3:0> 0100 r afe number to identify the design version 0100: for chip version 1v0 3 testreg_on 0 r/w 0: normal operation 1: enables writing to test register 3eh & 3fh to configure the otp and set the access mode. 2 monitor_on 0 r/w enables the monitor mode 0: normal operation 1: monitor mode enabled 1 cont_pwrup 0 r/w continues the automatic power-up sequence when using the i2c mode 0: chip stops the power-up sequence after the supplies are stable, switching on individual blocks has to be done via i2c commands 1: automatic power-up sequence is continued 0 pwr_hold 1 r/w 0: power up hold is cleared and afe will power down 1: is automatically set to on after power on www.austriamicrosystems.com revision 1.02 32 - 51 as3400 as3410 AS3430 1v0 data sheet - register description table 21. pwr_set register name base default pwr_set 2-wire serial 0x11 1111b (stand alone mode) 0x00 0000b (i2c mode) offset: 21h power setting register please be aware that writing to this register will enable/disable the corresponding blocks, while reading gets the actual status. it is not possible to read back e.g iled settings. this register is reset at por. bit bit name default access bit description 7 pwr_reg_on 0 r/w defines which register is used for the power settings. 0: all blocks stay on as defined in the start-up sequence 1: register 21h is used 6:5 iled<1:0> 00 w sets the current sunk into iled 00: current sink switched off 01: 25% 10: 50% 11: 100% 6 low_bat x r vbat supervisor status 0: vbat is above brown out level 1: bvdd has reached brown out level 5 pwrup_complete x r power-up sequencer status 0: power-up sequence incomplete 1: power-up sequence completed 4hp_on 0w 0: switches hp stage off 1: switches hp stage on xr 0: hp stage not powered 1: normal operation 3mic_on 0w 0: switches microphone stage off 1: switches microphone stage on xr 0: microphone stage not powered 1: normal operation 2lin_on 0w 0: switches line input stage off 1: switches line input stage on xr 0: line input stage not powered 1: normal operation 1mics_cp_on 0 w 0: switches microphone supply charge pump off 1: switches microphone supply charge pump on xr 0: microphone supply charge pump not powered 1: normal operation 0mics_on 0w 0: switches microphone supply off 1: switches microphone supply on xr 0: microphone supply not enabled 1: normal operation www.austriamicrosystems.com revision 1.02 33 - 51 as3400 as3410 AS3430 1v0 data sheet - register description table 22. anc_l2 register name base default anc_l2 2-wire serial 80h (otp) offset: 10h left otp microphone input register (2nd otp option) configures the gain for the left microphone input. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 test_bit_5 1 r for testing purpose only 6:0 micl_vol_otp2 <6:0> 000 0000 r/w volume settings for left microphone input, adjustable in 127 steps of 0.375db 00 0000: mute 00 0001: -5.625db gain 00 0010: -5.25 db gain .. 11 1110: 41.250db gain 11 1111: 41.625 db gain table 23. anc_r2 register name base default anc_r2 2-wire serial 00h (otp) offset: 11h right otp microphone input register (2nd otp option) configures the gain for the left microphone input. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 alt1_lock 0 r/w 0: additional bits can be fused inside register 10h & 11h 1: otp fusing for register 10h & 11h gets locked, no more changes can be done. 6:0 micr_vol_otp2 <6:0> 000 0000 r/w volume settings for right microphone input, adjustable in 127 steps of 0.375db 00 0000: mute 00 0001: -5.625db gain 00 0010: -5.25 db gain .. 11 1110: 41.250db gain 11 1111: 41.625 db gain www.austriamicrosystems.com revision 1.02 34 - 51 as3400 as3410 AS3430 1v0 data sheet - register description table 24. anc_l3 register name base default anc_l3 2-wire serial 80h (otp) offset: 12h left otp microphone input register (3rd otp option) configures the gain for the left microphone input. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 test_bit_6 1 r for testing purpose only 6:0 micl_vol_otp3 <6:0> 000 0000 r/w volume settings for left microphone input, adjustable in 127 steps of 0.375db 00 0000: mute 00 0001: -5.625db gain 00 0010: -5.25 db gain .. 11 1110: 41.250db gain 11 1111: 41.625 db gain table 25. anc_r3 register name base default anc_r3 2-wire serial 00h (otp) offset: 13h right otp microphone input register (3rd otp option) configures the gain for the left microphone input. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 alt2_lock 0 r/w 0: additional bits can be fused inside register 12h & 13h 1: otp fusing for register 12h & 13h gets locked, no more changes can be done. 6:0 micr_vol_otp3 <6:0> 000 0000 r/w volume settings for right microphone input, adjustable in 127 steps of 0.375db 00 0000: mute 00 0001: -5.625db gain 00 0010: -5.25 db gain .. 11 1110: 41.250db gain 11 1111: 41.625 db gain www.austriamicrosystems.com revision 1.02 35 - 51 as3400 as3410 AS3430 1v0 data sheet - register description table 26. anc_l4 register name base default anc_l4 2-wire serial 80h (otp) offset: 14h left otp microphone input register (4th otp option) configures the gain for the left microphone input. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 test_bit_7 1 r for testing purpose only 6:0 micl_vol_otp4 <6:0> 000 0000 r/w volume settings for left microphone input, adjustable in 127 steps of 0.375db 00 0000: mute 00 0001: -5.625db gain 00 0010: -5.25 db gain .. 11 1110: 41.250db gain 11 1111: 41.625 db gain table 27. anc_r4 register name base default anc_r4 2-wire serial 00h (otp) offset: 15h right otp microphone input register (4th otp option) configures the gain for the left microphone input. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 alt3_lock 0 r/w 0: additional bits can be fused inside register 14h & 15h 1: otp fusing for register 14h & 15h gets locked, no more changes can be done. 6:0 micr_vol_otp4 <6:0> 000 0000 r/w volume settings for right microphone input, adjustable in 127 steps of 0.375db 00 0000: mute 00 0001: -5.625db gain 00 0010: -5.25 db gain .. 11 1110: 41.250db gain 11 1111: 41.625 db gain table 28. mics_cntr register name base default mics_cntr 2-wire serial 00h (otp) offset: 16h microphone supply regsiter configures the low battery trehshold value bit bit name default access bit description 3 lowbat 0 r/w 0: default lowbat value 1: 100mv increase of lowbat threshold www.austriamicrosystems.com revision 1.02 36 - 51 as3400 as3410 AS3430 1v0 data sheet - register description table 29. pwrup_cntr register name base default pwrup_cntr 2-wire serial 00h (otp) offset: 17h powerup control register configures chip start-up speed. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 seq_lock 0 r/w 0: additional bits can be fused inside register 16h & 17h 1: otp fusing for register 16h & 17h gets locked, no more changes can be done. 6:2 fast_start <4:0> 0 0000 r/w 0h: ~900ms start-up time 0eh: ~600ms start-up time 1 lin_agc_off 0 r/w 0: line input agc enabled 1: line input agc switched off 0 mic_agc_off 0 r/w 0:microphone input agc enabled 1: microphone input agc switched off www.austriamicrosystems.com revision 1.02 37 - 51 as3400 as3410 AS3430 1v0 data sheet - register description table 30. anc_l register name base default anc_l 2-wire serial 80h (otp) offset: 30h left otp microphone input register configures the gain for the left microphone input. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 test_bit_1 1 r for testing purpose only 6:0 micl_vol_otp <6:0> 000 0000 r/w volume settings for left microphone input, adjustable in 127 steps of 0.375db 00 0000: mute 00 0001: -5.625db gain 00 0010: -5.25 db gain .. 11 1110: 41.250db gain 11 1111: 41.625 db gain table 31. anc_r register name base default anc_r 2-wire serial 80h (otp) offset: 31h right otp microphone input register configures the gain for the left microphone input. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 test_bit_2 1 r for testing purpose only 6:0 micr_vol_otp <6:0> 000 0000 r/w volume settings for right microphone input, adjustable in 127 steps of 0.375db 00 0000: mute 00 0001: -5.625db gain 00 0010: -5.25 db gain .. 11 1110: 41.250db gain 11 1111: 41.625 db gain www.austriamicrosystems.com revision 1.02 38 - 51 as3400 as3410 AS3430 1v0 data sheet - register description vvvvvvvvvv table 32. mic_mon register name base default mic_mon 2-wire serial 00h (otp) offset: 32h opt microphone monitor mode register configures the gain for the microphone input in monitor mode. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 mon_mode 0 r/w 0: monitor mode is working with fixed microphone gain 1: monitor mode uses adjustable gain via the vol pin 6:0 mic_mon_otp <6:0> 000 0000 r/w volume settings for microphone input during monitor mode, adjustable in 127 steps of 0.375db. if mon_mode bit is set to 1 the gain can be further adjusted via the vol pin. 00 0000: mute 00 0001: -5.625db gain 00 0010: -5.25 db gain .. 11 1110: 41.250db gain 11 1111: 41.625 db gain table 33. audio_set register name base default audio_set 2-wire serial 00h (otp) offset: 33h opt audio setting register configures the audio settings. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 vol_pin_off 0 r/w 0: vol pin is enabled 1: line in volume settings can only be done via i2c. vol_pin_mode has to be set to 1 in this mode. 6 vol_pin_mode 0 r/w 0: vol pin is in potentiometer mode 1: vol pin is in up/down button mode 5lin_mode_otp 0 r/w 0: line input stage operating in single ended mode 1: line input operating in mono balanced 4mic_mode_otp 0 r/w 0: microphone input stage operating in single ended mode 1: normal operating in mono balanced 3hp_mode_otp 0 r/w 0: headphone stage operating in single ended mode 1: normal operating in mono balanced 2:0 lin_mon_atten <6:0> 000 r/w volume settings for line input during monitor mode, adjustable in 7 steps of 6db and mute. 000: 0db gain 001: -6db gain .. 110: -36db gain 111: mute www.austriamicrosystems.com revision 1.02 39 - 51 as3400 as3410 AS3430 1v0 data sheet - register description table 34. gp_op register name base default gp_op 2-wire serial 00h (otp) offset: 34h otp general purpose operat ional amplifier register enables the opamp stages, defines opamp 2 mode and gain and sets the hp input multiplexer. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7:6 hp_mux_otp<1:0> 00 r/w multiplexes the analog audio signal to hp amp 00: mic: selects qmicl/r output 01:op1: selects qop1l/r outputs 10:op2: selects qop2l/r output 11: open: no signal mixed together with the line input signal 5:2 op2_otp<3:0> 0000 r/w mode and volume settings for op2, adjustable in 15 steps of 0.75db 0000: op2l in inverting mode 0001: 0 db gain, op2l in non inverting mode 0001: 0.75 db gain, non inverting .., 1110: 9.75db gain, non inverting 1111:.10.5 db gain, non inverting 1 op2_on 0 r/w 0: op2 is switched off 1: left op2 is enabled 0 opl_on 0 r/w 0: op1 is switched off 1: op1 is enabled table 35. otp_sys register name base default otp_sys 2-wire serial 40h (otp) offset: 35h otp system settings register defines several system settings for otp operation. this is a special register, writing needs to be enabled by writing 10b to reg 3fh first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7 main_lock 0 r/w 0: additional bits can be fused inside the otp 1: otp fusing gets locked, no more changes can be done 6 test_bit_3 1 r for testing purpose only 5:4 mon_hp_mux <1:0> 00 r/w multiplexes the analog audio signal to hp amp in monitor mode 00: mic: selects qmicl/r output 01: op1: selects qop1l/r outputs 10:op2: selects qop2l/r output 11: open: no signal mixed together with the line input signal 3:2 iled_otp<1:0> 00 w sets the current sunk into iled 00: current sink switched off 01: 25% 10: 50% 11: 100% 1 mics_cp_off 0 r/w 0: mics charge pump is enabled 1: mics charge pump is switched off 0i2c 0r/w 0: i2c and stand alone mode start-up possible 1: chip starts-up in i2c mode only www.austriamicrosystems.com revision 1.02 40 - 51 as3400 as3410 AS3430 1v0 data sheet - register description table 36. config_1 register name base default config_1 2-wire serial 00h offset: 3eh otp configuration register controls the clock configuration. this is a special register, writing needs to be enabled by writing 9h to reg 20h first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7:4 - 0000 n/a 3 extburnclk 0 n/a 0: ext. clock for otp burning disabled 1: ext. clock for otp burning enabled 2:0 - 000 n/a table 37. config_2 register name base default config_2 2-wire serial 00h offset: 3fh otp access configuration register controls the otp access. this is a special register, writing needs to be enabled by writing 9h to reg 20h first. this register is reset at por and gets loaded with the otp fuse contents. bit bit name default access bit description 7:6 - 000 n/a 5 tm34 0 n/a this register defines the register bank selection for register tm_reg34-35 and tmreg30-33. depending on tm34 you can select either between register bank 14h-17h and 10h-13h enabled or 30h-33h and 34h-37h enabled. 0: test mode registers 14 h-17h and 10h-13h disabled test mode registers 30h-33h and 34h-37h enabled 1: test mode registers 14h-17h and 10h-13h enabled test mode registers 30h-33h and 34h-37h disabled 4 burnsw 0 n/a 0: burn switch from linl to vneg is disabled 1: burn switch from linl to vneg is enabled 3 tm_reg34-35 0 n/a 0: test mode for register 34h-35h disabled test mode for register 14h-17h disabled 1: test mode for register 34h-35h enabled test mode for register 14h-17h enabled 2 tm_reg30-33 0 n/a 0: test mode for register 30h-33h disabled test mode for register 10h-13h disabled 1: test mode for register 30h-33h enabled test mode for register 10h-13h enabled 1:0 otp_mode<1:0> 00 r/w controls the otp access 00: read 01: load 10: write 11: burn www.austriamicrosystems.com revision 1.02 41 - 51 as3400 as3410 AS3430 1v0 data sheet - application information 10 application information figure 27. as3410 high performance application in bridged mode for high impedance headsets for high impedance headphones two as3410 can be used in a bridged mode each one driving one side of the headphone load as diffe rential output to get 24mw output power per channel. also the microphone inputs can be used in differential mode to reduce the noise le vel. figure 28. as3400 feed-forward anc block diagram www.austriamicrosystems.com revision 1.02 42 - 51 as3400 as3410 AS3430 1v0 data sheet - application information figure 29. AS3430 on music player with anc www.austriamicrosystems.com revision 1.02 43 - 51 as3400 as3410 AS3430 1v0 data sheet - application information figure 30. as3410 feed-forward application example 1 1 2 2 3 3 4 4 d d c c b b a a c6 1uf c12 2.2uf r14 2k2 c13 2.2uf r13 2k2 p1a 50k c3 10u c10 10u vpos vpos vneg vneg c15 4.7uf mics mics volume control 4 3 2 1 u3 aaa batterie battery socket mics r19 150r r20 150r l 3 gnd 1 r 2 u2 line input headphone for open loop noise cancelation vpos r18 10k r17 10k monitor button 2 3 1 on/off bypass slider 2 3 1 2 3 1 alternative volume control led vcc r1 220r c1 2.2uf + 1 - 2 j? right speaker + 1 - 2 j? left speaker r? r? c? r? r? c? values dep. on headphone characteristics, also other topologies possible values dep. on headphone characteristics, also other topologies possible c8 22nf c7 22nf gnd gnd + 1 - 2 j4 con_mic + 1 - 2 j1 con_mic mic lpf cap dep. on headphone characteristics vneg as3410 qmicl 1 agnd 2 linl 3 linr 4 vol_csda 5 mode_cscl 6 micl 7 iled 8 mics 9 micr 10 qmicr 11 iop1r 12 qop1r 13 vss 14 hpl 15 hpr 16 hvdd 17 vbat 18 cpp 19 gnd 20 cpn 21 vneg 22 qop1l 23 iop1l 24 u? as3410 www.austriamicrosystems.com revision 1.02 44 - 51 as3400 as3410 AS3430 1v0 data sheet - application information figure 31. AS3430 feed-back application example 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 d d c c b b a a c6 1u c12 2.2u r14 2k2 c13 2.2u r13 2k2 r15 r9 r16 c16 r10 c17 r11 c18 r12 c14 c11 p1a 50k r6 r5 r4 r3 r2 r1 c5 c4 c2 c9 c1 c3 10u c10 10u d1 led vpos vpos vneg vneg c15 4.7uf mics mics vpos power led volume control 4 3 2 1 u3 aaa batterie battery socket mics r19 150r r20 150r l 3 gnd 1 r 2 u2 line input headphone for closed loop noise cancelation c8 c7 vpos r18 10k r17 10k monitor button 2 3 1 on/off bypass slider 2 3 1 2 3 1 line + - 5 4 3 2 line + - 5 4 3 2 alternative volume control lpf and notch-filter to avoid oscillation by acustic (headphone-speaker <=> mic) lpf and notch-filter to avoid oscillation by acustic (headphone-speaker <=> mic) mic supply resistors depend on mic spec r25 220r c20 2.2uf mic lpf cap dep. on headphone characteristics mic lpf cap dep. on headphone characteris tics qlinl 2 qmicl 3 agnd 4 linl 5 linr 6 mode/cscl 8 vol/csda 7 micl 9 mics 11 iled 10 micr 12 qmicr 13 qlinr 14 iop1r 15 qop1r 16 iop2r 17 qop2r 18 vss 19 hpl 20 hvss 21 hpr 22 hvdd 23 vbat 24 cpp 26 gnd 27 cpn 28 vneg 29 qop2l 30 iop2l 31 qop1l 32 iop1l 1 nc 25 AS3430 u1 AS3430 www.austriamicrosystems.com revision 1.02 45 - 51 as3400 as3410 AS3430 1v0 data sheet - application information figure 32. as3400 mode differential feed forward application example 1 1 2 2 3 3 4 4 d d c c b b a a as3400 agnd 1 linl 2 linr 3 vol/csda 4 mode/cscl 5 micl 6 mics 7 micr 8 qmicr 9 qlinr 10 iop1r 11 qop1r 12 iop2r 13 qop2r 14 vss 15 hpl 16 hpr 17 hpvdd 18 vbat 19 cpp 20 gnd 21 cpn 22 vneg 23 qmicl 24 u1 as3400 c1 1uf pgnd c4 100nf c5 10uf pgnd pgnd vpos c2 100nf c3 10uf pgnd pgnd vneg vneg agnd c7 2.2uf c6 4.7uf r3 220 pgnd mics mics_f micr hpr hpl micl cpn cpp vpos vpos vneg t-a pgnd agnd agnd + 1 - 2 s1 + 1 - 2 m1 r4 2k2 r? 2k2 agnd mics_f c? 2.2uf c? 2.2uf mic lpf cap dep. on headphone characteristics c? rc filter network c? 470nf c? 470nf differential audio output e.g. bluetooth, audio codec cpu for i2c control r? 2k2 r? 2k2 vpos vpos supply from power management unit 1v - 1.8v www.austriamicrosystems.com revision 1.02 46 - 51 as3400 as3410 AS3430 1v0 data sheet - pack age drawings and marking 11 package drawings and marking figure 33. qfn marking table 38. package code aywwzzz yy ww i zz last two digits of the year manufacturing week plant identifier free choice / traceability code www.austriamicrosystems.com revision 1.02 47 - 51 as3400 as3410 AS3430 1v0 data sheet - pack age drawings and marking figure 34. as3400, as3410, 24-pin qfn 0.5mm pitch www.austriamicrosystems.com revision 1.02 48 - 51 as3400 as3410 AS3430 1v0 data sheet - pack age drawings and marking figure 35. AS3430 32-pin qfn 0.5mm pitch www.austriamicrosystems.com revision 1.02 49 - 51 as3400 as3410 AS3430 1v0 data sheet - revision history revision history note: typos may not be explicitly mentioned under revision history. revision date owner description 0.1 19.1.2010 pkm initial release 0.2 29.1.2010 pkm updated block diagrams and application schematics 1.0 27.10.2010 hgt update to new datasheet template 1.01 11.11.2010 hgt updated package drawings, qfn markings and operating temperature range 1.02 24.11.2010 hgt inserted register description for mic_r and updated register table overview www.austriamicrosystems.com revision 1.02 50 - 51 as3400 as3410 AS3430 1v0 data sheet - ordering information 12 ordering information the devices are available as the standard products shown in table 39 . note: all products are rohs compliant and austriamicrosystems green. buy our products or get free samples online at icdirect: http://www.austriamicr osystems.com/icdirect for further information and requests, please contact us mailto:sales@austriamicrosystems.com or find your local distributor at http://www.austriamicros ystems.com/distributor table 39. ordering information ordering code description delivery form package as3400-eqfp low power ambient noise-cancelling speaker driver tape & reel dry pack qfn 24 [4.0x4.0x0.85mm] 0.5mm pitch as3410-eqfp low power ambient noise-cancelling speaker driver tape & reel dry pack qfn 24 [4.0x4.0x0.85mm] 0.5mm pitch AS3430-eqfp low power ambient noise-cancelling speaker driver tape & reel dry pack qfn 32 [5.0x5.0x0.85mm] 0.5mm pitch www.austriamicrosystems.com revision 1.02 51 - 51 as3400 as3410 AS3430 1v0 data sheet - copyrights copyrights copyright ? 1997-2010, austriamicrosystems ag, tobelbaderstrasse 30, 8141 unterpremstaetten, austria-europe. trademarks registe red ?. all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by the warranty and patent indemnification provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth he rein or regarding the freedom of the described devices from patent infringement. au striamicrosystems ag reserves the right to change specificatio ns and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamic rosystems ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temper ature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems ag for each application. for shipments of les s than 100 parts the manufacturing flow might show deviations from the st andard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag tobelbaderstrasse 30 a-8141 unterpremstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact |
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